The present invention relates to a lateral insulated gate bipolar transistor, and more particularly to improvement on a latch-up prevention ability of the lateral insulated gate bipolar transistor.
In the recent years, an insulated gate bipolar transistor (hereinafter referred to as IGBT) is highlighted as a semiconductor device capable of controlling a relatively large current at a high speed. In order to integrate the IGBT together with another device, it is desirable that an emitter (cathode), a gate (control electrode) and a collector (anode) are placed in the same plane. An example of an IGBT structure satisfying this requirement is a lateral IGBT disclosed by JP-A-59-132667. The disclosed structure is shown in FIG. 11. In an n.sup.- layer 20 are independently provided a p layer 50 having an impurity concentration higher than that of the n.sup.- layer 20 and a p.sup.+ layer 70 having an impurity concentration higher than that of the p layer 50. In the p layer 50 is provided an n.sup.+ layer 60 having an impurity concentration higher than the p layer 50. The p layer 50 and the n.sup.+ layer 60 are electrically short-circuited by an emitter electrode 2. A collector electrode 3 is provided on a surface of the p.sup.+ layer 70 in ohmic contact with the p.sup.+ layer 70. An insulating film 10 is provided stretching over the surfaces of the n.sup.+ layer 60, the p layer 50 and the n.sup.- layer 20 and a gate electrode 1 is provided on the insulating film 10. The n.sup.+ layer 60 and the insulating film 10 are provided opposite to the p.sup.+ layer 70 and the n.sup.+ layer 60 exists between the p.sup.+ layer 70 and a region where the p layer 50 and the emitter electrode 2 are in ohmic contact with each other. In this transistor, when a positive potential is applied to the gate electrode 1, the conductivity of a surface portion of the p layer 50 under the insulating film 10 is inverted into an n type so that a channel is formed. Electrons .crclbar. flowing out of the n.sup.+ layer 60 pass through the channel and the n.sup.- +layer 70 and reach the p.sup.+ from which positive holes .sym. are injected. Thereby, the n.sup.- layer 20 having a high resistance is conductivity-modulated to exhibit a low resistance, thereby providing a merit that an on.sup.- resistance lower than that of a MOSFET having the same forward blocking characteristic can be realized.
In the above-mentioned conventional lateral IGBT, the n.sup.+ layer 60 exists between the p.sup.+ layer 70 and the region where the p layer 50 and the emitter electrode 2 are in ohmic contact with each other. In this case, the positive holes .sym. injected from the p.sup.+ layer 70 concentrically flow through the p layer 50 under the n.sup.+ layer 60 and reach the emitter electrode. Therefore, a potential drop is produced due to a resistance component R of the p layer 50 in a lateral direction. As a result, there is a problem that a pn junction formed by the n.sup.+ layer 60 and the p layer 50 is forward-biased by the potential drop to cause the injection of electrons from the n.sup.+ layer 60 into the p layer 50 so that there occurs a so-called latch-up phenomenon in which a parasitic thyristor formed by the n.sup.+ layer 60, the p layer 50, the n.sup.- layer 20 and the p.sup.+ layer 70 is turned on, thereby making it impossible to control a current by the gate.